Networks on Chip in System-on-Chip Design (Q168057)

From geokb
Revision as of 12:26, 8 September 2024 by Sky (talk | contribs) (‎Changed an Item: moved OpenAlex ID to its dedicated external ID datatype for consistency)
"Design and optimization of chip-to-chip communication networks within multi-core processors."
  • Networks on Chip
  • Interconnection Networks
  • System-on-Chip
  • NoC Architecture
  • Routing Algorithms
  • Performance Evaluation
  • Power Optimization
  • Wireless Interconnects
  • Fault Tolerance
  • Multi-core Processors
Language Label Description Also known as
English
Networks on Chip in System-on-Chip Design
"Design and optimization of chip-to-chip communication networks within multi-core processors."
  • Networks on Chip
  • Interconnection Networks
  • System-on-Chip
  • NoC Architecture
  • Routing Algorithms
  • Performance Evaluation
  • Power Optimization
  • Wireless Interconnects
  • Fault Tolerance
  • Multi-core Processors

Statements