Networks on Chip in System-on-Chip Design (Q168057): Difference between revisions

From geokb
(‎Changed label, description and/or aliases in en, and other parts: modified description with assistance from Llama 3.1)
(‎Changed an Item: moved OpenAlex ID to its dedicated external ID datatype for consistency)
Property / same as
 
Property / same as: https://openalex.org/T10829 / rank
Normal rank
 
Property / OpenAlex ID
 
Property / OpenAlex ID: T10829 / rank
 
Normal rank

Revision as of 12:26, 8 September 2024

"Design and optimization of chip-to-chip communication networks within multi-core processors."
  • Networks on Chip
  • Interconnection Networks
  • System-on-Chip
  • NoC Architecture
  • Routing Algorithms
  • Performance Evaluation
  • Power Optimization
  • Wireless Interconnects
  • Fault Tolerance
  • Multi-core Processors
Language Label Description Also known as
English
Networks on Chip in System-on-Chip Design
"Design and optimization of chip-to-chip communication networks within multi-core processors."
  • Networks on Chip
  • Interconnection Networks
  • System-on-Chip
  • NoC Architecture
  • Routing Algorithms
  • Performance Evaluation
  • Power Optimization
  • Wireless Interconnects
  • Fault Tolerance
  • Multi-core Processors

Statements